The present invention relates to technologies for manufacturing integrated circuits, on a silicon substrate, incorporating bipolar transistors of very small dimensions.
For reasons of integration density and also for reasons of operating rapidity, efforts are made to produce bipolar transistors as small as possible and having more especially a small emitter surface, a small base thickness and a small distance between the emitter and the base contact. In so far as this latter point is concerned, it follows from the requirement of reducing the access resistance to the base between the base contact and the base properly speaking. This resistance could be reduced by increasing the doping of the base, but that would lead to a very poor current gain for the transistor.
Thus, in order to produce transistors with a good performance, the base region is broken down into two parts: an intrinsic lightly doped base region, immediately adjacent the emitter region, and an extrinsic base region, more heavily doped, adjacent the intrinsic base region and covered by a base contact. The intrinsic base region must have as small a thickness as possible and the base contact must come as close as possible to the emitter, while obviously avoiding any contact with the emitter. In addition, the extrinsic base region must not come into contact with the emitter region: short-circuiting of the transistor would result because of a poor junction. These requirements, applied to emitter dimensions of the order of a micron, entail extremely accurate etching and doping techniques while using, as much as possible, self-alignment processes for eliminating the risks of error due to the inaccurate super-imposition of successive etching masks.
Techniques have already been proposed for manufacturing very small sized transistors, with an intrinsic lightly doped base and an extrinsic more heavily doped base, using two layers of polycrystalline silicon which provide self-alignment of the base contact and the extrinsic base region, as well as self-alignment of the emitter contact with the emitter region.
The present invention proposes a new manufacturing process which retains the advantages of these two alignments and which further allows self-alignment of the emitter region with respect to the intrinsic and extrinsic base regions and so with respect to the base contact.